The present invention relates generally to an improved computer processing instruction set, and more particularly to an instruction set having a compare functionality.
Computer architecture designers are constantly trying to increase the speed and efficiency of computer processors. For example, computer architecture designers have attempted to increase processing speeds by increasing clock speeds and attempting latency hiding techniques, such as data prefetching and cache memories. In addition, other techniques, such as instruction-level parallelism using VLIW, multiple-issue superscalar, speculative execution, scoreboarding, and pipelining are used to further enhance performance and increase the number of instructions issued per clock cycle (IPC).
Architectures that attain their performance through instruction-level parallelism seem to be the growing trend in the computer architecture field. Examples of architectures utilizing instruction-level parallelism include single instruction multiple data (SIMD) architecture, multiple instruction multiple data (MIMD) architecture, vector or array processing, and very long instruction word (VLIW) techniques. Of these, VLIW appears to be the most suitable for general-purpose computing.
Instruction sets typically include one or more compare instructions. These instructions compare two input registers so that decisions can be made based upon the result. For example, a branch in software is a compare function followed by checking the result to decide which branch to follow. The output from the compare instruction travels through a dedicated path to a dedicated output register. However, use of a single dedicated register is undesirable in VLIW systems because two separate data paths may want to access the dedicated register at the same time. To accommodate a single dedicated output register, a VLIW system would schedule compare instructions so that none overlapped. Additionally, use of a dedicated path to the output register consumes die area and increases the circuit complexity.
Compare instructions only determine a single relationship between two numbers. For example, a compare instruction answers the question of whether one number is either less than, greater than or equal to another number with a response of true or false. However, separate compare instructions are needed if answers to multiple compare-type questions are needed. As the compare instructions needed for answering multiple questions are executed sequentially, this extends the time needed to answer a multitude of compare-type questions.